1. Field of the Invention
The present invention relates to voltage-controlled oscillators and, in particular, to methods and apparatus for obtaining a variable clock frequency having a well-controlled output range and duty cycle over varying temperature, process and supply voltage.
2. Discussion of the Prior Art
As shown in FIG. 1, a basic phase-locked loop (PLL) system 10 includes three essential elements--a phase detector 12, a loop filter 14 and a voltage-controlled oscillator (VCO) 16--interconnected to form a feedback system. The phase detector 12 compares the phase of the input signal V.sub.s (t) with the output frequency V.sub.o (t) of the VCO 16 and generates an error voltage V.sub.d (t) corresponding to the difference. The error voltage signal V.sub.d (t) is then filtered by the loop filter 14 and applied to the control terminal of the VCO -6 in the form of an error voltage V.sub.e (t) to control its frequency of oscillation.
The VCO 16 is the most critical element of the PLL system 10. The tuning slope, that is, the output frequency V.sub.o (t) dependence on control voltage V.sub.e (t), is determined by the conversion gain constant K.sub.VCO of the VCO 16. Similarly, the linearity of the voltage-to-frequency conversion characteristics of the PLL system 10 is determined solely by the limitations of the control characteristics of the VCO 16. Thus, the stability and control characteristics of the VCO 16 are key design parameters in monolithic PLL circuits.
The VCO 16, which is basically an analog circuit, must be immune to on-chip and off-chip noise sources. If it is not, then its output V.sub.o (t) will exhibit short-term frequency instability, or jitter. Maintaining a low VCO gain constant K.sub.vco is one method of reducing noise sensitivity. The required operating frequency for conventional VCOs ranges from a few MHz to beyond 200 MHz. Tuning ranges up to 2 to 1 are also required. To be easily compatible with 5 V power supply constraints and minimum phase detector/charge pump solutions, the tuning voltage should be approximately 1.5 V to (V.sub.cc -1.5 V).
As stated above, the VCO gain constant K.sub.vco must be well controlled so that loop filtering schemes are predictable and stable. This is especially important in data acquisition and mass storage applications such as disk controllers and constant density recording. At higher output frequencies, the duty cycle is also critical.
In many applications, the process of choice for VCO design has been complementary-metal-oxide-semiconductor (CMOS) technology. However, previous CMOS VCO designs have been greatly affected by process variations, which can cause large changes in the VCO gain constant K.sub.vco, and/or have required external trimming components. External trimming adds pins and cost to the PLL chip and provides an antenna through which noise can be coupled into the sensitive analog sections of the chip.
One example of a high frequency CMOS phase-locked loop is described by Ware et al, "a 200 MHz CMOS Phase-Lock-Loop with Dual Phase Detectors", IEEE Transactions on Solid State Circuits, May 10, 1989. The Ware et al PLL features a VCO that requires the use of a bandgap regulator that relies on parasitic NPN transistors. It achieves frequency control by varying the applied voltage across the ring oscillator stages. The VCO utilized by Ware is based on a ring of three inverting amplifiers.
Yousefi, "14 MHz-100 MHz CMOS PLL Based Frequency Synthesizer IC", describes a PLL design where the VCO gain constant compensation depends upon the use of an external resistor.
U.S. Pat. No. 4,876,519, issued on Oct. 24, 1989 to Craig M. Davis and Richard R. Rasmussen, and commonly assigned herewith, discloses a PLL implementation in emitter-coupled-logic (ECL) technology. Although the Davis/Rasmussen design provides significant advantages, its Bipolar/CMOS process requirement prohibits its use in some applications.
It would, therefore, be desirable to have available a CMOS-based PLL that features good VCO frequency control, gain control and duty-cycle characteristics without using external components.